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OS-6546 Use PCID if KPTI is enabled

@@ -135,11 +135,11 @@
 {
         struct mmuext_op t;
         uint_t count;
 
         if (IN_XPV_PANIC()) {
-                mmu_tlbflush_entry((caddr_t)va);
+                mmu_flush_tlb_page((uintptr_t)va);
         } else {
                 t.cmd = MMUEXT_INVLPG_LOCAL;
                 t.arg1.linear_addr = (uintptr_t)va;
                 if (HYPERVISOR_mmuext_op(&t, 1, &count, DOMID_SELF) < 0)
                         panic("HYPERVISOR_mmuext_op() failed");

@@ -152,11 +152,11 @@
 {
         struct mmuext_op t;
         uint_t count;
 
         if (IN_XPV_PANIC()) {
-                mmu_tlbflush_entry((caddr_t)va);
+                mmu_flush_tlb_page((uintptr_t)va);
                 return;
         }
 
         t.cmd = MMUEXT_INVLPG_MULTI;
         t.arg1.linear_addr = (uintptr_t)va;

@@ -1987,11 +1987,14 @@
 
         /*
          * Disable preemption and grab the CPU's hci_mutex
          */
         kpreempt_disable();
+
         ASSERT(CPU->cpu_hat_info != NULL);
+        ASSERT(!(getcr4() & CR4_PCIDE));
+
         mutex_enter(&CPU->cpu_hat_info->hci_mutex);
         x = PWIN_TABLE(CPU->cpu_id);
         pteptr = (x86pte_t *)PWIN_PTE_VA(x);
 #ifndef __xpv
         if (mmu.pae_hat)

@@ -2022,11 +2025,11 @@
                         if (mmu.pae_hat)
                                 *pteptr = newpte;
                         else
                                 *(x86pte32_t *)pteptr = newpte;
                         XPV_DISALLOW_PAGETABLE_UPDATES();
-                        mmu_tlbflush_entry((caddr_t)(PWIN_VA(x)));
+                        mmu_flush_tlb_kpage((uintptr_t)PWIN_VA(x));
                 }
         }
         return (PT_INDEX_PTR(PWIN_VA(x), index));
 }
 

@@ -2135,11 +2138,11 @@
 #ifdef __xpv
                         if (!IN_XPV_PANIC())
                                 xen_flush_va((caddr_t)addr);
                         else
 #endif
-                                mmu_tlbflush_entry((caddr_t)addr);
+                                mmu_flush_tlb_page(addr);
                         goto done;
                 }
 
                 /*
                  * Detect if we have a collision of installing a large

@@ -2378,21 +2381,23 @@
                 src_va = (caddr_t)
                     PT_INDEX_PTR(hat_kpm_pfn2va(src->ht_pfn), entry);
         } else {
                 uint_t x = PWIN_SRC(CPU->cpu_id);
 
+                ASSERT(!(getcr4() & CR4_PCIDE));
+
                 /*
                  * Finish defining the src pagetable mapping
                  */
                 src_va = (caddr_t)PT_INDEX_PTR(PWIN_VA(x), entry);
                 pte = MAKEPTE(src->ht_pfn, 0) | mmu.pt_global | mmu.pt_nx;
                 pteptr = (x86pte_t *)PWIN_PTE_VA(x);
                 if (mmu.pae_hat)
                         *pteptr = pte;
                 else
                         *(x86pte32_t *)pteptr = pte;
-                mmu_tlbflush_entry((caddr_t)(PWIN_VA(x)));
+                mmu_flush_tlb_kpage((uintptr_t)PWIN_VA(x));
         }
 
         /*
          * now do the copy
          */